Implicit vs. Explicit Resource Allocation in SMT Processors

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In a Simultaneous Multithreaded (SMT) architecture, the front end of a superscalar is adapted in order to be able to fetch from several threads while the back end is shared among the threads. In this paper, we describe different resource sharing models in SMT processors. We show that explicit resource allocation can improve SMT performance. In addition, it enables SMTs to solve other QoS requirements, not realizable before.

Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz

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DSD 2004 | Explicit Resource Allocation | Hardware | Resource Sharing Models | SMT Processors |

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Added	20 Aug 2010
Updated	20 Aug 2010
Type	Conference
Year	2004
Where	DSD
Authors	Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero

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Implicit vs. Explicit Resource Allocation in SMT Processors

DSD 2004 | Explicit Resource Allocation | Hardware | Resource Sharing Models | SMT Processors |

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